ISL9305
9
FN7605.1
August 15, 2011
I
2
C Compatible Interface
The ISL9305 offers an I
2
C compatible interface, using two pins:
SCLK for the serial clock and SDAT for serial data respectively.
According to the I
2
C specifications, a pull-up resistor is needed
for the clock and data signals to connect to a positive supply.
When the ISL9305 and the host use different supply voltages,
the pull-up resistors should be connected to the higher voltage
rail.
Signal timing specifications should satisfy the standard I
2
C bus
specification. The maximum bit rate is 400kb/s and more details
regarding the I
2
C specifications can be found from Philips.
I
2
C Slave Address
The ISL9305 serves as a slave device and the 7-bit default chip
address is 1101000, as shown in Figure 5 According to the I
2
C
specifications, here the value of Bit 0 determines the direction of
the message (0 means write and 1 means read).
I
2
C Protocol
Figures 6, 7, and 8 show three typical I
2
C-bus transaction
protocols.
FIGURE 4. EXPOSED THERMAL PAD
1
R/W
1
0
1
0
0
0
BIT 2
BIT 3
BIT 0
BIT 1
BIT 6
BIT 7
BIT 4
BIT 5
MSB
LSB
FIGURE 5. I
2
C SLAVE ADDRESS
S
0
A
P
SLAVE ADDRESS
REGISTER ADDRESS
DATA BYTE 1
R/W
AUTO INCREMENT
REGISTER ADDRESS
DATA BYTE N
AUTO INCREMENT
REGISTER ADDRESS
DATA BYTE 2
AUTO INCREMENT
REGISTER ADDRESS
A
SYSTEM HOST
ISL9305
A  ACKNOWLEDGE
N  NOT ACKNOWLEDGE
S  START
P  STOP
A
A
A
OPTIONAL
FIGURE 6. I
2
C WRITE
S
0
A
P
A
SLAVE ADDRESS
REGISTER ADDRESS
DATA BYTE 1
R/W
AUTO INCREMENT
REGISTER ADDRESS
S
1
SLAVE ADDRESS
R/W
N
DATA BYTE N
AUTO INCREMENT
REGISTER ADDRESS
A
DATA BYTE 2
AUTO INCREMENT
REGISTER ADDRESS
A
A
SYSTEM HOST
ISL9305
A  ACKNOWLEDGE
N  NOT ACKNOWLEDGE
S  START
P  STOP
OPTIONAL
FIGURE 7. I
2
C READ SPECIFYING REGISTER ADDRESS
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